annotate operator_def/assemble_D1.m @ 822:4808c4bd844e feature/operator_files

Add assemble_boundary_op
author Ylva Rydin <ylva.rydin@telia.com>
date Mon, 10 Sep 2018 17:16:22 +0200
parents 95c26000c0ba
children 5c8b1a3bd0e6
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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821
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff changeset
1 function [D1,e_l,e_r] = assemble_D1(stencil,h,m)
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff changeset
2 stencil_variables = read_stencil(stencil);
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff changeset
3
822
4808c4bd844e Add assemble_boundary_op
Ylva Rydin <ylva.rydin@telia.com>
parents: 821
diff changeset
4 D1 = assemble_op(stencil_variables.inner_stencil,stencil_variables.boundary_block,m)/h;
4808c4bd844e Add assemble_boundary_op
Ylva Rydin <ylva.rydin@telia.com>
parents: 821
diff changeset
5 [e_l, e_r] = assemble_boundary_op(stencil_variables);
821
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff changeset
6 end