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annotate operator_def/assemble_op.m @ 826:b94bb6ffa38b feature/operator_files

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rename d2_2 to D1_standard_2
author Ylva Rydin <ylva.rydin@telia.com>
date Mon, 10 Sep 2018 17:48:48 +0200
parents 95c26000c0ba
children d1e5143d67ed
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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821
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
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1 function [D] = assemble_op(inner_stencil,boundary_block,m)
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
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2
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Ylva Rydin <ylva.rydin@telia.com>
parents:
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3 [height_b, width_b] = size(boundary_block);
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Ylva Rydin <ylva.rydin@telia.com>
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4 width_i = length(inner_stencil);
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Ylva Rydin <ylva.rydin@telia.com>
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5
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Ylva Rydin <ylva.rydin@telia.com>
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6 max_offset = floor(width_i/2);
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Ylva Rydin <ylva.rydin@telia.com>
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7 diags = -max_offset:max_offset;
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Ylva Rydin <ylva.rydin@telia.com>
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8
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Ylva Rydin <ylva.rydin@telia.com>
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9
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
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10 D = stripeMatrix(inner_stencil, diags, m);
95c26000c0ba Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
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11
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12 D(1:height_b,1:width_b) = boundary_block;
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Ylva Rydin <ylva.rydin@telia.com>
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13 D(m-height_b+1:m,m-width_b+1:m) = rot90( -boundary_block ,2);
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Ylva Rydin <ylva.rydin@telia.com>
parents:
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14 end