Mercurial > repos > public > sbplib
annotate operator_def/assemble_opTest.m @ 821:95c26000c0ba feature/operator_files
Add files for parsing operator data stencil file
author | Ylva Rydin <ylva.rydin@telia.com> |
---|---|
date | Mon, 10 Sep 2018 16:57:17 +0200 |
parents | |
children | 32c360bb480e |
rev | line source |
---|---|
821
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
1 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
2 function tests = assemble_opTest() |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
3 tests = functiontests(localfunctions); |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
4 end |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
5 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
6 function TestAssembleD1(testCase) |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
7 m = 10; |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
8 op = sbp.D2Standard(m,{0 1},4); |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
9 h = op.h; |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
10 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
11 boundary_block = op.D1(1:4,1:6)*h; |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
12 inner = op.D1(5,3:7)*h; |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
13 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
14 D1_new = assemble_op(inner,boundary_block,h,m); |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
15 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
16 verifyEqual(testCase,D1_new,op.D1,'AbsTol',1e-10) |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
17 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
18 end |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
19 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
20 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
21 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
22 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
23 |
95c26000c0ba
Add files for parsing operator data stencil file
Ylva Rydin <ylva.rydin@telia.com>
parents:
diff
changeset
|
24 |