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comparison operator_def/assemble_opTest.m @ 827:d1e5143d67ed feature/operator_files

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add testfor D2 and sign in assemble_op
author Ylva Rydin <ylva.rydin@telia.com>
date Mon, 10 Sep 2018 18:50:29 +0200
parents b94bb6ffa38b
children f82da6644f42
comparison
equal deleted inserted replaced
826:b94bb6ffa38b 827:d1e5143d67ed
25 25
26 verifyEqual(testCase,D1,op.D1,'AbsTol',1e-10) 26 verifyEqual(testCase,D1,op.D1,'AbsTol',1e-10)
27 verifyEqual(testCase,e_l,op.e_l,'AbsTol',1e-10) 27 verifyEqual(testCase,e_l,op.e_l,'AbsTol',1e-10)
28 verifyEqual(testCase,e_r,op.e_r,'AbsTol',1e-10) 28 verifyEqual(testCase,e_r,op.e_r,'AbsTol',1e-10)
29 end 29 end
30
31
32 function TestAssembleD2(testCase)
33 m = 10;
34 op = sbp.D2Standard(m,{0 3},2);
35 h = op.h;
36
37 [D2,e_l,e_r,d1_l,d1_r] = assemble_D2('D2_standard_2',h,m);
38
39 verifyEqual(testCase,D2,op.D2,'AbsTol',1e-10)
40 verifyEqual(testCase,e_l,op.e_l,'AbsTol',1e-10)
41 verifyEqual(testCase,e_r,op.e_r,'AbsTol',1e-10)
42 verifyEqual(testCase,d1_l,op.d1_l,'AbsTol',1e-10)
43 verifyEqual(testCase,d1_r,op.d1_r,'AbsTol',1e-10)
44 end